392200 Projekt "Hardwarebeschleunigung von HASH-Wert-Berechnungen durch FPGAs" (Pj) (WiSe 2011/2012)

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Viele peer-to-peer-basierte sicherheitsrelevante Anwendungen im Internet basieren auf leistungsfähigen kryptografischen Algorithmen. Grundlage für solche Algorithmen bieten sogenannte Hashwerte, wie z.B. SHA-256. Die Berechnung solcher Hashwerte ist sehr komplex und wir heutzutage vor allem auf leistungsfähigen Grafikkarten (GPUs) durchgeführt. Mithilfe moderner Grafikkarten können mehrere 100 MHash/s errechnet werden, die hohe Leistungsaufnahme sorgt dabei aber für ein niedriges Verhältnis MHash/Joule und erfordert eine aufwendige Kühlung des Systems.
Um die Ressourceneffizienz der Hash-Berechnung zu erhöhen, eignen sich insbesondere parallele Hardware-Architekturen auf Basis rekonfigurierbarer Field-Programmable-Gate-Arrays (FPGAs). Im Rahmen dieser Projektgruppe sollen bestehende FPGA-Implementierungen des SHA-256-Algorithmus bezüglich ihrer Ressourceneffizienz hin untersucht und optimiert werden. Die resultierende FPGA-Implementierung soll gegenüber der Umsetzung auf Grafikkarten ein deutlich besseres Verhältnis von MHash/Joule erreichen.

Many peer-to-peer based security relevant applications in the internet are based on powerful cryptographic algorithms. Basic concept of these algorithms are hashes, e.g., SHA-256. The computation of such hashes is very complex und usually performed on high-performance graphics processing units (GPUs). Modern GPUs reach throughputs of multiple 100 MHash/s. Though, due to their high power consumption, a low ratio of MHash/Joule is achieved and a complex cooling is required.
To enhance the resource efficiency of the hash computation, parallel hardware architectures based on reconfigurable field programmable gate arrays (FPGAs) can be used. Within the scope of this project group, existing FPGA implementations of the SHA-256 algorithm should be analyzed and optimized w.r.t its resource efficiency. The resulting FPGA implementation should reach a higher ratio of MHash/Joule compared to implementations using GPUs.

Teaching staff

Subject assignments

Degree programme/academic programme Validity Variant Subdivision Status Semester LP  
Intelligente Systeme / Master (Enrollment until SoSe 2012) Projekt Wahlpflicht 1. 3. 10 benotet  
Naturwissenschaftliche Informatik / Master (Enrollment until SoSe 2012) Projekt I; Projekt II Wahlpflicht 1. 3. 10 benotet  

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Last update basic details/teaching staff:
Friday, December 11, 2015 
Last update times:
Thursday, September 26, 2013 
Last update rooms:
Friday, October 7, 2011 
Type(s) / SWS (hours per week per semester)
project (Pj) / 4
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Faculty of Technology
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27932099