392007 Rechnerarchitektur (V) (WiSe 2024/2025)
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Die Vorlesung Rechnerarchitektur befasst sich mit der Architektur moderner Digitalrechner. Dazu werden Grundlagen zu digitalelektronischen Schaltungen, deren schaltalgebraischer Beschreibung und deren Einsatzbereichen in Digitalrechnern sowie Verfahren zur Kodierung von Zahlen und Zeichen im Digitalrechner vermittelt. Darauf aufbauend wird die Architektur von Digitalrechnern und deren Prozessoren vorgestellt. Eine Einführung in die "instruction set architecture" von Prozessoren erfolgt am Beispiel der x86-64 Architektur und deren Programmierung auf der Ebene von Assembler-Instruktionen. Die Übungen zur Vorlesung vertiefen das Wissen durch theoretische Aufgaben und Aufgaben zur Entwicklung von Assembler-Programmen für x86-64 Prozessoren.
Vorlesung und Übungen finden in Präsenz statt (Übungen im GZI).
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Teaching staff
Dates ( Calendar view )
| Frequency | Weekday | Time | Format / Place | Period | |
|---|---|---|---|---|---|
| weekly | Fr | 14-16 | H1 | 07.10.2024-31.01.2025
not on: 11/1/24 / 12/6/24 / 12/27/24 / 1/3/25 |
|
| one-time | Fr | 14-16 | CITEC | 06.12.2024 |
Subject assignments
| Module | Course | Requirements | |
|---|---|---|---|
| 39-Inf-8_a Rechnerarchitektur | Rechnerarchitektur | Student information | |
| - | Graded examination | Student information |
The binding module descriptions contain further information, including specifications on the "types of assignments" students need to complete. In cases where a module description mentions more than one kind of assignment, the respective member of the teaching staff will decide which task(s) they assign the students.
| Degree programme/academic programme | Validity | Variant | Subdivision | Status | Semester | LP | |
|---|---|---|---|---|---|---|---|
| Studieren ab 50 |
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